FPGA Realization of Low Register Systolic...

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FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over GF(2m) and Their Applications in Trinomial Multipliers

Chen, Pingxiuqi, Basha, Shaik Nazeem, Mozaffari-Kermani, Mehran, Azarderakhsh, Reza, Xie, Jiafeng
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Year:
2016
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2016.2600568
File:
PDF, 2.86 MB
english, 2016
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