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[IEEE 2016 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2016.6.14-2016.6.16)] 2016 IEEE Symposium on VLSI Technology - Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm
Zhou, X., Waldron, N., Boccardi, G., Sebaai, F., Merckling, C., Eneman, G., Sioncke, S., Nyns, L., Opdebeeck, A., Maes, J. W., Xie, Q., Givens, M., Tang, F., Jiang, X., Guo, W., Kunert, B., Teugels, LYear:
2016
Language:
english
DOI:
10.1109/VLSIT.2016.7573420
File:
PDF, 795 KB
english, 2016