[IEEE 2016 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2016.6.14-2016.6.16)] 2016 IEEE Symposium on VLSI Technology - Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole
Franco, J., Vais, A., Sioncke, S., Putcha, V., Kaczer, B., Shie, B.-S., Shi, X., Mahlouji, R., Nyns, L., Zhou, D., Waldron, N., Maes, J.W., Xie, Q., Givens, M., Tang, F., Jiang, X., Arimura, H., SchraYear:
2016
Language:
english
DOI:
10.1109/vlsit.2016.7573371
File:
PDF, 742 KB
english, 2016