Designing with Xilinx® FPGAs || Vivado IP Integrator

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Designing with Xilinx® FPGAs || Vivado IP Integrator

Churiwala, Sanjay
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Volume:
10.1007/97
Year:
2017
Language:
english
DOI:
10.1007/978-3-319-42438-5_7
File:
PDF, 594 KB
english, 2017
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