[IEEE 2016 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC) - Shenzhen, China (2016.5.17-2016.5.21)] 2016 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC) - SI architecture optimized high speed serial design for PCB cost saving
Yinglei Ren,, Xiao, Kai, Nan Kang,, Lumin Zhang,, Dan Liu,, Li, Y LYear:
2016
Language:
english
DOI:
10.1109/apemc.2016.7522862
File:
PDF, 803 KB
english, 2016