![](/img/cover-not-exists.png)
[IEEE 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) - Bengaluru, India (2016.1.10-2016.1.12)] 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) - Effect on temperature and time in parallel test scheduling with alterations in layers arrangements of 3D stacked SoCs
Rawat, Indira, Gupta, M. K., Singh, VirendraYear:
2016
Language:
english
DOI:
10.1109/VLSI-SATA.2016.7593029
File:
PDF, 2.98 MB
english, 2016