An Area Efficient Stacked Latch Design Tolerant to SEU in...

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An Area Efficient Stacked Latch Design Tolerant to SEU in 28 nm FDSOI Technology

Wang, Haibin B., Chen, Li, Liu, Rui, Li, Yuanqing, Kauppila, Jeffrey, Bhuva, Bharat, Lilja, Klas, Wen, Shi-Jie, Wong, Richard, Fung, Rita, Baeg, Sanghyeon
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Year:
2016
Language:
english
Journal:
IEEE Transactions on Nuclear Science
DOI:
10.1109/TNS.2016.2627003
File:
PDF, 940 KB
english, 2016
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