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[IEEE 2016 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2016.6.15-2016.6.17)] 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) - A 56Gb/s PAM4 wireline transceiver using a 32-way time-interleaved SAR ADC in 16nm FinFET
Frans, Yohan, Elzeftawi, Mohamed, Hedayati, Hiva, Im, Jay, Kireev, Vassili, Pham, Toan, Shin, Jaewook, Upadhyaya, Parag, Lei Zhou,, Asuncion, Santiago, Borrelli, Chris, Zhang, Geoff, Hongtao Zhang,,Year:
2016
Language:
english
DOI:
10.1109/vlsic.2016.7573474
File:
PDF, 977 KB
english, 2016