A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs
Jo, Kwan-Hee, Bong, Ji-Hye, Min, Kyeong-Sik, Kang, Sung-Mo (Steve)Volume:
6
Year:
2009
Language:
english
Journal:
IEICE Electronics Express
DOI:
10.1587/elex.6.1414
File:
PDF, 693 KB
english, 2009