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[IEEE 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Tallinn, Estonia (2016.9.26-2016.9.28)] 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Power-aware test optimization for core-based 3D-SOCs under TSV-constraints
Banerjee, Sabyasachee, Majumder, Subhashis, Bhattacharya, Bhargab B.Year:
2016
Language:
english
DOI:
10.1109/vlsi-soc.2016.7753537
File:
PDF, 839 KB
english, 2016