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All-digital background calibration technique for timing mismatch of time-interleaved ADCs
Chen, Hongmei, Pan, Yunsheng, Yin, Yongsheng, Lin, FujiangVolume:
57
Language:
english
Journal:
Integration, the VLSI Journal
DOI:
10.1016/j.vlsi.2016.11.003
Date:
March, 2017
File:
PDF, 1.55 MB
english, 2017