10T SRAM Using Half- $V_{\text {DD}}$ Precharge and...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2017 / 4 Vol. 25; Iss. 4

10T SRAM Using Half- $V_{\text {DD}}$ Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage

Maroof, Naeem, Kong, Bai-Sun
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Volume:
25
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2016.2637918
Date:
April, 2017
File:
PDF, 2.72 MB
english, 2017
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