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Error-Resilient Integrated Clock Gate for Clock-Tree Power Optimization on a Wide Voltage IOT Processor
Zhu, Tao-Tao, Meng, Jian-Yi, Xiang, Xiao-Yan, Yan, Xiao-LangYear:
2017
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2017.2652482
File:
PDF, 2.62 MB
english, 2017