[IEEE 2016 Conference on Design of Circuits and Integrated Systems (DCIS) - Granada, Spain (2016.11.23-2016.11.25)] 2016 Conference on Design of Circuits and Integrated Systems (DCIS) - Effect of different design stages on the SEU failure rate of FPGA systems
Villalta, Igor, Bidarte, Unai, Gomez-Cornejo, Julen, Jimenez, Jaime, Cuadrado, CarlosYear:
2016
Language:
english
DOI:
10.1109/DCIS.2016.7845269
File:
PDF, 1023 KB
english, 2016