![](/img/cover-not-exists.png)
SEU mitigation exploratory tests in a ITER related FPGA
Batista, Antonio J.N., Leong, Carlos, Santos, Bruno, Fernandes, Ana, Ramos, Ana Rita, Santos, Joana P., Marques, José G., Teixeira, Isabel C., Teixeira, João P., Sousa, Jorge, Gonçalves, BrunoVolume:
118
Language:
english
Journal:
Fusion Engineering and Design
DOI:
10.1016/j.fusengdes.2017.03.106
Date:
May, 2017
File:
PDF, 1.77 MB
english, 2017