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Three-dimensional monolithic integration of III–V and Si(Ge) FETs for hybrid CMOS and beyond
Deshpande, Veeresh, Djara, Vladimir, O’Connor, Eamon, Hashemi, Pouya, Morf, Thomas, Balakrishnan, Karthik, Caimi, Daniele, Sousa, Marilyne, Fompeyrine, Jean, Czornomaz, LukasVolume:
56
Language:
english
Journal:
Japanese Journal of Applied Physics
DOI:
10.7567/JJAP.56.04CA05
Date:
April, 2017
File:
PDF, 1.75 MB
english, 2017