Silicon nanowire array architecture for heterojunction...

Semiconductors 2017 / 4 Vol. 51; Iss. 4

Silicon nanowire array architecture for heterojunction electronics

Solovan, M. M., Brus, V. V., Mostovyi, A. I., Maryanchuk, P. D., Orletskyi, I. G., Kovaliuk, T. T., Abashin, S. L.
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Volume:
51
Language:
english
Journal:
Semiconductors
DOI:
10.1134/S1063782617040200
Date:
April, 2017
File:
PDF, 926 KB
english, 2017
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