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Optimizing latency in Xilinx FPGA implementations of the GBT
Muschter, S, Baron, S, Bohm, C, Cachemiche, J -P, Soos, CVolume:
5
Language:
english
Journal:
Journal of Instrumentation
DOI:
10.1088/1748-0221/5/12/C12017
Date:
December, 2010
File:
PDF, 210 KB
english, 2010