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[IEEE 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2017.4.24-2017.4.27)] 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - A 10-bit 100-MS/s SAR ADC with capacitor swapping technique in 90-nm CMOS
Chung, Yung-Hui, Shih, Song-YouYear:
2017
DOI:
10.1109/VLSI-DAT.2017.7939661
File:
PDF, 794 KB
2017