[IEEE 2017 International Symposium on VLSI Design,...

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[IEEE 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2017.4.24-2017.4.27)] 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - An all-digital phase-locked loop with a multi-delay-switching TDC

Su, Chung-Cheng, Lin, Cheng-Chung, Hung, Chung-Chih
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Year:
2017
Language:
english
DOI:
10.1109/VLSI-DAT.2017.7939662
File:
PDF, 704 KB
english, 2017
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