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[IEEE 2017 IEEE 21st Workshop on Signal and Power Integrity (SPI) - Lake Maggiore, Italy (2017.5.7-2017.5.10)] 2017 IEEE 21st Workshop on Signal and Power Integrity (SPI) - SI analysis of DDR bus during read/write operation transitions
Bhagwath, Nitin, Muranyi, Arpad, Smirnov, Dmitry, Ferry, Chuck, Sato, Atsushi, Ono, Megumi, Ikeda, Shinichiro, Sugaya, Yumiko, Fukuhara, Tsuyoshi, Wolff, RandyYear:
2017
Language:
english
DOI:
10.1109/SaPIW.2017.7944018
File:
PDF, 369 KB
english, 2017