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[IEEE 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2017.4.24-2017.4.27)] 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model
Yu-Ju Shih,, Chih-Tsun Huang,, Jing-Jia Liou,, Jyu-Yuan Lai,, Chih-Wea Wang,, Chi-Feng Wu,Year:
2017
Language:
english
DOI:
10.1109/VLSI-DAT.2017.7939676
File:
PDF, 794 KB
english, 2017