Exploiting Bounds Optimization for the Semi-formal...

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Integration, the VLSI Journal 2017 / 6

Exploiting Bounds Optimization for the Semi-formal Verification of Analog Circuits

Lahiouel, Ons, Aridhi, Henda, Zaki, Mohamed H., Tahar, Sofiène
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Language:
english
Journal:
Integration, the VLSI Journal
DOI:
10.1016/j.vlsi.2017.06.008
Date:
June, 2017
File:
PDF, 1.25 MB
english, 2017
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