Low-power and high-speed shift-based multiplier for error...

  • Main
  • 2017 / 7
  • Low-power and high-speed shift-based multiplier for error...
Microprocessors and Microsystems 2017 / 7

Low-power and high-speed shift-based multiplier for error tolerant applications

Malek, Sami, Abdallah, Sarah, Chehab, Ali, Elhajj, Imad H., Kayssi, Ayman
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Language:
english
Journal:
Microprocessors and Microsystems
DOI:
10.1016/j.micpro.2017.07.002
Date:
July, 2017
File:
PDF, 1.77 MB
english, 2017
Conversion to is in progress
Conversion to is failed