[IEEE 2017 IEEE Symposium in Low-Power and High-Speed Chips...

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[IEEE 2017 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) - Yokohama (2017.4.19-2017.4.21)] 2017 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) - An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches

Sato, Masayuki, Sakai, Zentaro, Egawa, Ryusuke, Kobayashi, Hiroaki
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Year:
2017
Language:
english
DOI:
10.1109/CoolChips.2017.7946380
File:
PDF, 153 KB
english, 2017
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