A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm
Hatai, Indranil, Chakrabarti, Indrajit, Banerjee, SwapnaYear:
2017
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2017.2719053
File:
PDF, 2.75 MB
english, 2017