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A New Current Profile Determination Methodology Incorporating Gating Logic to Minimize the Noise of CPU Chip by 40%
Laskar, Nivedita, Debnath, Suman, Majumder, Alak, Bhattacharyya, Bidyut KumarLanguage:
english
Journal:
Journal of Circuits, Systems and Computers
DOI:
10.1142/S0218126618500494
Date:
July, 2017
File:
PDF, 755 KB
english, 2017