A novel design for ultra-low power pulse-triggered...

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Integration, the VLSI Journal 2017 / 9

A novel design for ultra-low power pulse-triggered D-Flip-Flop with optimized leakage power

Karimi, Ahmad, Rezai, Abdalhossein, Hajhashemkhani, Mohammad Mahdi
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Language:
english
Journal:
Integration, the VLSI Journal
DOI:
10.1016/j.vlsi.2017.09.002
Date:
September, 2017
File:
PDF, 1.10 MB
english, 2017
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