[IEEE 2016 20th International Symposium on VLSI Design and...

  • Main
  • [IEEE 2016 20th International Symposium...

[IEEE 2016 20th International Symposium on VLSI Design and Test (VDAT) - Guwahati, India (2016.5.24-2016.5.27)] 2016 20th International Symposium on VLSI Design and Test (VDAT) - Design of fault tolerant majority voter for TMR circuit in QCA

Chattopadhyay, Subrata, Tripathi, Shiv Bhushan, Goswami, Mrinal, Sen, Bibhash
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Year:
2016
Language:
english
DOI:
10.1109/ISVDAT.2016.8064905
File:
PDF, 111 KB
english, 2016
Conversion to is in progress
Conversion to is failed