16×16 bit parallel multiplier based on 6 K gate array with...

16×16 bit parallel multiplier based on 6 K gate array with 0.3 μm AlGaAs/GaAs quantum well transistors

Thiede, A., Berroth, M., Hurm, V., Nowotny, U., Seibel, J., Gotzeina, W., Sedler, M., Raynor, B., Koehler, K., Hofmann, P., Huelsmann, A., Kaufel, G., Schneider, J.
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Volume:
28
Language:
english
Journal:
Electronics Letters
DOI:
10.1049/el:19920639
Date:
May, 1992
File:
PDF, 401 KB
english, 1992
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