Clock Jitter Reduction and Flat Frequency Generation in PLL...

IEEE Transactions on Components Packaging and Manufacturing Technology 2017 / 11 Vol. 7; Iss. 11

Clock Jitter Reduction and Flat Frequency Generation in PLL Using Autogenerated Control Feedback

Bhowmik, Suman, Pradhan, Sambhu Nath, Bhattacharyya, Bidyut K.
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Volume:
7
Language:
english
Journal:
IEEE Transactions on Components, Packaging and Manufacturing Technology
DOI:
10.1109/tcpmt.2017.2751742
Date:
November, 2017
File:
PDF, 1.87 MB
english, 2017
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