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[IEEE 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Jeju, Korea (South) (2018.1.22-2018.1.25)] 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Fully parallel RRAM synaptic array for implementing binary neural network with (+1, −1) weights and (+1, 0) neurons
Sun, Xiaoyu, Peng, Xiaochen, Chen, Pai-Yu, Liu, Rui, Seo, Jae-sun, Yu, ShimengYear:
2018
Language:
english
DOI:
10.1109/ASPDAC.2018.8297384
File:
PDF, 264 KB
english, 2018