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[IEEE 2017 IEEE International High-Level Design Validation and Test Workshop (HLDVT) - Santa Cruz, CA (2017.10.5-2017.10.6)] 2017 IEEE International High Level Design Validation and Test Workshop (HLDVT) - 3D-DyCAC: Dynamic numerical-based mechanism for reducing crosstalk faults in 3D ICs
Shirmohammadi, Zahra, Sabzi, Hadi Zamani, Miremadi, Seyed GhassemYear:
2017
Language:
english
DOI:
10.1109/hldvt.2017.8167468
File:
PDF, 1.66 MB
english, 2017