A 65 nm CMOS 6-bit 20 GS/s Time-Interleaved DAC with...

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A 65 nm CMOS 6-bit 20 GS/s Time-Interleaved DAC with Full-Binary Sub-DACs

Kim, Si-Nai, Kim, Woo-Cheol, Seo, Min-Jae, Ryu, Seung-Tak
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Year:
2018
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2018.2809965
File:
PDF, 1.19 MB
english, 2018
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