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[IEEE 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Jeju, Korea (South) (2018.1.22-2018.1.25)] 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - An optimal gate design for the synthesis of ternary logic circuits
Kim, Sunmean, Lim, Taeho, Kang, SeokhyeongYear:
2018
Language:
english
DOI:
10.1109/ASPDAC.2018.8297369
File:
PDF, 1.67 MB
english, 2018