A 14-bit 500-MS/s DAC with 211-MHz 70 dB SFDR bandwidth...

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Analog Integrated Circuits and Signal Processing 2018 / 3

A 14-bit 500-MS/s DAC with 211-MHz 70 dB SFDR bandwidth using TRI-DEMRZ

Lai, Longqiang, Li, Xueqing, Liu, Jianan, Yang, Huazhong
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Language:
english
Journal:
Analog Integrated Circuits and Signal Processing
DOI:
10.1007/s10470-018-1141-5
Date:
March, 2018
File:
PDF, 1.54 MB
english, 2018
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