Low-power logic computing realized in a single...

Solid-State Electronics 2018 / 2

Low-power logic computing realized in a single electric-double-layer MoS 2 transistor gated with polymer electrolyte

Guo, Junjie, Xie, Dingdong, Yang, Bingchu, Jiang, Jie
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Language:
english
Journal:
Solid-State Electronics
DOI:
10.1016/j.sse.2018.02.007
Date:
February, 2018
File:
PDF, 904 KB
english, 2018
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