![](/img/cover-not-exists.png)
A 1.66 mV FOM Output Cap-Less LDO with Current-Reused Dynamic Biasing and 20 ns Settling Time
Desai, Chirag, Mandal, Debashis, Bakkaloglu, Bertan, Kiaei, SayfeYear:
2018
Language:
english
Journal:
IEEE Solid-State Circuits Letters
DOI:
10.1109/LSSC.2018.2813533
File:
PDF, 1.13 MB
english, 2018