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[IEEE 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - Burlingame, CA, USA (2017.10.16-2017.10.19)] 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - An implementation of 2RW dual-port SRAM using 65 nm Silicon-on-Thin-Box (SOTB) for smart IoT
Yamamoto, Yoshiki, Hasegawa, Takumi, Yabuuchi, Makoto, Nii, Koji, Sawada, Yohei, Tanaka, Shinji, Shinozaki, Yoshihiro, Ito, Kyoji, Shinkawata, Hiroki, Kamohara, ShiroYear:
2017
Language:
english
DOI:
10.1109/S3S.2017.8309224
File:
PDF, 1.68 MB
english, 2017