[IEEE 2016 20th International Symposium on VLSI Design and Test (VDAT) - Guwahati, India (2016.5.24-2016.5.27)] 2016 20th International Symposium on VLSI Design and Test (VDAT) - High performance bit-sliced pipelined comparator tree for FPGAs
Palchaudhuri, Ayan, Dhar, Anindya SundarYear:
2016
Language:
english
DOI:
10.1109/ISVDAT.2016.8064843
File:
PDF, 1.27 MB
english, 2016