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[IEEE 2017 7th International Symposium on Embedded Computing and System Design (ISED) - Durgapur, India (2017.12.18-2017.12.20)] 2017 7th International Symposium on Embedded Computing and System Design (ISED) - An approach for area and power optimization of flipping 3-D discrete wavelet transform architecture
Hegde, Ganapathi, Reddy, Kotha Srinivasa, Ramesh, T KYear:
2017
Language:
english
DOI:
10.1109/ISED.2017.8303941
File:
PDF, 121 KB
english, 2017