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Realizing logic functions using single Double-Gate Tunnel FETs: A simulation study
Banerjee, Saptak, Garg, Shelly, Saurabh, SnehYear:
2018
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/LED.2018.2819205
File:
PDF, 484 KB
english, 2018