[IEEE 2016 IEEE Central America and Panama Student Conference (CONESCAPAN) - Guatemala, Guatemala (2016.9.27-2016.9.30)] 2016 IEEE Central America and Panama Student Conference (CONESCAPAN) - Architecture design to optimize multipliers in FPGAs based on Maya multiplying method
Siordia, Fabian Venegas, Raygoza Panduro, Juan J., Becerra Alvarez, Edwin C., Cisneros, Susana Ortega, Domınguez, Jorge RiveraYear:
2016
DOI:
10.1109/conescapan.2016.8075212
File:
PDF, 1.17 MB
2016