Fast hardware architecture for 2D separable convolution...

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IEEE Transactions on Circuits and Systems II: Express Briefs 2018

Fast hardware architecture for 2D separable convolution operations

Mukherjee, Debasish, Mukhopadhyay, Susanta
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Year:
2018
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2018.2819187
File:
PDF, 312 KB
english, 2018
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