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[IEEE 2017 Devices for Integrated Circuit (DevIC) - Kalyani, India (2017.3.23-2017.3.24)] 2017 Devices for Integrated Circuit (DevIC) - Quantum analytical modelling of threshold voltage for linearly graded alloy material gate recessed S/D SOI MOSFET
Dey Malakar, Tiya, Bhattacharyya, Partha, Sarkar, Subir KumarYear:
2017
Language:
english
DOI:
10.1109/DEVIC.2017.8074056
File:
PDF, 273 KB
english, 2017