[IEEE 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Cambridge (2017.10.23-2017.10.25)] 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - High-yield design of high-density SRAM for low-voltage and low-leakage operations
Dhori, Kedar Janardan, Chawla, Hitesh, Kumar, Ashish, Pandey, Prashant, Kumar, Promod, Ciampolini, Lorenzo, Cacho, Florian, Croain, DamienYear:
2017
DOI:
10.1109/DFT.2017.8244429
File:
PDF, 1.34 MB
2017