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DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency and Restorable Endurance
Thakkar, Ishan G, Pasricha, SudeepYear:
2017
Language:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/tcad.2017.2762921
File:
PDF, 1.16 MB
english, 2017