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Process and device integration for silicon tunnel FETs utilizing isoelectronic trap technology to enhance the ON current
Mori, Takahiro, Asai, Hidehiro, Fukuda, Koichi, Matsukawa, TakashiVolume:
57
Language:
english
Journal:
Japanese Journal of Applied Physics
DOI:
10.7567/JJAP.57.04FA04
Date:
April, 2018
File:
PDF, 1.46 MB
english, 2018