Architecture and Implementation of a Reduced EPIC Processor

Architecture and Implementation of a Reduced EPIC Processor

GAO, Jun, ZHANG, Minxuan, XING, Zuocheng, FENG, Chaochao
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Volume:
E96.D
Year:
2013
Language:
english
Journal:
IEICE Transactions on Information and Systems
DOI:
10.1587/transinf.e96.d.9
File:
PDF, 1.84 MB
english, 2013
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