Performance Optimization of All-Spin Logic Device Based on Silver Interconnects and Asymmetric Tunneling Layer
Li, Cheng, Cai, Li, Wang, Sen, Yang, Xiaokuo, Cui, Huanqing, Wei, Bo, Dong, Danna, Li, Chuang, Liu, Jiahao, Liu, BaojunYear:
2018
Language:
english
Journal:
IEEE Transactions on Magnetics
DOI:
10.1109/TMAG.2018.2825946
File:
PDF, 1.07 MB
english, 2018